IEEE PROJECTS LIST - YEAR OF 2018-2019


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COMMUNICATION SYSTEMS \ VLSI DESIGN \ IMAGE PROCESSING BASED DIGITAL DESIGN (FPGA)
Code Project Title
IESVL-0060 Design Of Power And Area Efficient Approximate Multipliers
  
 
IESVL-0066 Energy-Efficient And Process-Variation-Resilient Write Circuit Schemes For Spin Hall Effect Mram Device
  
 
IESVL-0065 Low Complexity And Critical Path Based Vlsi Architecture For Lms Adaptive Filter Using Distributed Arithmeticalgorithm And Architecture Design Of Adaptive Filters With Error Nonlinearities
  
 
IESVL-0063 Low-Power Design For A Digit-Serial Polynomial Basis Finite Field Multiplier Using Factoring Technique
  
 
IESVL-0061 Multipliers-Driven Perturbation Of Coefficients For Low-Power Operation In Reconfigurable Fir Filters
  
 
IESVL-0062 Roba Multiplier: A Rounding-Based Approximate Multiplier For High-Speed Yet Energy-Efficient Digital Signal Processing
  
 
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